/* Copyright (C) 2015-2025 Free Software Foundation, Inc.
   Contributed by ARM Ltd.

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

/* Additional control over certain tuning parameters.  Before including
   this file, define a macro:

     AARCH64_EXTRA_TUNING_OPTION (name, internal_name)

   Where:

     NAME is a string giving a friendly name for the tuning flag.
     INTERNAL_NAME gives the internal name suitable for appending to
     AARCH64_TUNE_ to give an enum name. */

AARCH64_EXTRA_TUNING_OPTION ("rename_fma_regs", RENAME_FMA_REGS)

/* Some of the optional shift to some arthematic instructions are
   considered cheap.  Logical shift left <=4 with or without a
   zero extend are considered cheap.  Sign extend; non logical shift left
   are not considered cheap.  */
AARCH64_EXTRA_TUNING_OPTION ("cheap_shift_extend", CHEAP_SHIFT_EXTEND)

AARCH64_EXTRA_TUNING_OPTION ("cse_sve_vl_constants", CSE_SVE_VL_CONSTANTS)

AARCH64_EXTRA_TUNING_OPTION ("matched_vector_throughput", MATCHED_VECTOR_THROUGHPUT)

AARCH64_EXTRA_TUNING_OPTION ("avoid_cross_loop_fma", AVOID_CROSS_LOOP_FMA)

AARCH64_EXTRA_TUNING_OPTION ("fully_pipelined_fma", FULLY_PIPELINED_FMA)

/* Enable is the target prefers to use a fresh register for predicate outputs
   rather than re-use an input predicate register.  */
AARCH64_EXTRA_TUNING_OPTION ("avoid_pred_rmw", AVOID_PRED_RMW)

/* Whether writes to the FPMR are cheap enough that:

       msr     fpmr, <value>

   is better than:

       mrs     tmp, fpmr
       cmp     tmp, <value>
       beq     1f
       msr     fpmr, <value>
     1:

   even when the branch is predictably taken.  */
AARCH64_EXTRA_TUNING_OPTION ("cheap_fpmr_write", CHEAP_FPMR_WRITE)

/* Baseline tuning settings suitable for all modern cores.  */
#define AARCH64_EXTRA_TUNE_BASE (AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND	\
				 | AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA)

#undef AARCH64_EXTRA_TUNING_OPTION
